On many CPU architectures, especially older ones, there are a relatively small number (sometimes only two or three!) of CPU registers. Modern CPUs are sometimes much more symmetric with respect to register set architecture. If you're an assembly language programmer, you know all about registers. If you're not, you can think of them as particularly fast memory locations that machine-level computer instructions can access directly (that is, without having a memory address).
This characteristic of a small number of registers wasn't limited to microprocessors; all the early “mainframe” and “mini” computers were built the same way. The first mainframe computer I worked with was a Univac CP-642A, and if I remember correctly it had just four registers: A, Q, I, and the program counter. All of the subsequent mainframes and minis I worked with were also machines with limited register sets, with some of the most modern of them having a couple dozen registers. Similarly, all the early single-chip microcomputers I worked with had very limited register sets as well. The TI 99000 attempted to move a lot of register functionality into memory locations, but even it had over a dozen specialized registers.
All of these machines with limited register sets shared another characteristic: to various degrees the registers were specialized. One register might have special capabilities for increment and decrement. Another might be specially usable as an index into memory. Another might be part of double-precision multiply and divide operands. Or perhaps a couple of registers might have a special “swap” capability. This sort of thing was quite normal in those early CPUs, and the special register set capabilities were directly reflected in the machine-level instruction sets.
William Swanson has a nice article up exploring the Intel 8086 register set architecture in quite a bit of detail. It's a specific case of this more general design characteristic. Reading this brought back a lot of memories, both from the distant past :) and more recently, with PIC single-chip systems...
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